1. Field of the Invention
The present invention relates to a semiconductor integrated circuit oriented silicon wafer sliced out of a silicon ingot manufactured by a Czochralski method (hereinafter called xe2x80x9cCZ methodxe2x80x9d), and to a manufacturing method of the silicon wafer. The present invention further relates to a method for heat treating such a semiconductor integrated circuit oriented silicon wafer, so as to render such a silicon wafer to exhibit an intrinsic gettering effect (hereinafter called xe2x80x9cIG effectxe2x80x9d).
2. Description of the Related Art
Recently, causes of deterioration of yields in processes for manufacturing semiconductor integrated circuits include existence of: micro defects of oxygen precipitations which lead to nuclei of oxidation induced stacking faults (hereinafter called xe2x80x9cOSF""sxe2x80x9d); crystal originated particles (hereinafter called xe2x80x9cCOP""sxe2x80x9d); and an interstitial-type large dislocation (hereinafter called xe2x80x9cL/Dxe2x80x9d). Micro defects as nuclei of OSF""s are introduced into a silicon ingot during crystal growth, and actualize such as in an oxidation process on manufacturing semiconductor devices, leading to malfunctions such as increase of leakage current of fabricated devices. Meantime, cleaning mirror-polished silicon wafers by a mixed solution of ammonia and hydrogen peroxide leads to formation of pits on the wafer surface, and such pits are detected as particles similarly to real or intrinsic particles. Such pits are called COP""s, to distinguish them from real particles. COP""s which are pits on a wafer surface cause deterioration of electric characteristics such as a time dependent dielectric breakdown (TDDB) characteristic and a time zero dielectric breakdown (TZDB) characteristic. Further, existence of COP""s in a wafer surface causes physical steps during a wiring process of devices, and these steps cause wire breakage to thereby reduce the yield of products. On the other hand, an L/D is called a dislocation cluster, or a dislocation pit since a pit is formed when a silicon wafer having this defect is immersed in a selective etching solution containing hydrofluoric acid as a main ingredient. Such an L/D also causes deterioration of electric characteristics such as a leak characteristic and an isolation characteristic.
From the above, it is required to reduce OSF""s, COP""s and L/D""s from a silicon wafer to be used for manufacturing a semiconductor integrated circuit.
As a method for reducing such OSF""s and COP""s, there has been conventionally disclosed one for heat treating a silicon wafer in an atmosphere of 100% hydrogen or in an atmosphere of mixed hydrogen and argon at temperatures in a range of 1,200xc2x0 C. to a melting point of silicon, making use of an apparatus capable of rapidly heating and rapidly cooling the silicon wafer (Japanese Patent Application Laid-Open No. HEI-10-326790). By this method, the number of COP""s of 0.12 xcexcm or greater per 8-inch diameter wafer can be reduced to 50 or less, to thereby improve the yield having been deteriorated due to the time zero dielectric breakdown characteristic.
In the conventional method, however, there is used a silicon wafer in which the number of COP""s of 0.12 xcexcm or greater on the whole surface of an 8-inch diameter wafer is 300 or more before heat treatment, problematically resulting in that it will be extremely difficult to reduce the number of COP""s down to substantially zero over the whole surface of the wafer and that the wafer is susceptible to contamination such as Fe due to the high-temperature heat treatment exceeding 1,250xc2x0 C. in a reductive atmosphere. Further, the heat treatment at temperatures higher than 1,150xc2x0 C. by the apparatus capable of rapidly heating and rapidly cooling tends to problematically cause slip which is a kind of crystal defect. In addition, rapid heating leads to suppression of oxygen precipitation nuclei to be introduced upon pulling up, resulting in that precipitation of such nuclei in a device process becomes insufficient and no gettering effects can be expected, so that the removing ability of the wafer for removing contaminous impurities due to metal contamination is defectively lowered.
Meanwhile, there has been conventionally disclosed a defect-free silicon wafer free of OSF""s, COP""s and L/D""s, in Japanese Patent Application Laid-Open No. HEI-11-1393. This defect-free silicon wafer is one sliced out from a single silicon crystal ingot comprising a perfect domain [P] supposed to be free of agglomerates of vacancy point defects and free of agglomerates of interstitial silicon point defects within the ingot. The perfect domain [P] exists between an interstitial silicon point defect dominant domain [I] and a vacancy point defect dominant domain [V] within the single silicon crystal ingot. The silicon wafer comprising the perfect domain [P] is formed by determining a value of V/G (mm2/minute xc2x0 C.) such that OSF""s generated in a ring shape during a thermal oxidization treatment disappears at the center of the wafer, in which V (mm/minute) is a pulling-up speed of the ingot, and G (xc2x0 C./minute) is a vertical temperature gradient of the ingot near the interface between a silicon melt and the ingot.
The silicon wafer sliced out from an ingot comprising the perfect domain [P] is free of OSF""s, COP""s and L/D""s. However, oxygen precipitation is not necessarily caused within the wafer by the heat treatment in a device manufacturing process, leading to a possibility of an insufficient IG effect. Some semiconductor device manufacturers may demand silicon wafers which are free of OSF""s, COP""s and L/D""s but have abilities for gettering metal contamination caused in the device process. Metal contamination of wafers having insufficient IG abilities in the device process leads to junction leakage, and to occurrence of malfunctions of devices due to a trap level of metal impurities.
Further, there has been proposed a heat treatment method for exhibiting an IG effect (Japanese Patent Application Laid-Open No. HEI-8-45945), comprising the steps of: holding a silicon wafer just ground and polished after sliced out from a single silicon crystal ingot at 500 to 800xc2x0 C. for 0.5 to 20 hours, to thereby introduce oxygen precipitation nuclei into the wafer; rapidly heating the silicon wafer including the oxygen precipitation nuclei from a room temperature to temperatures of 800-1,000xc2x0 C. and holding the wafer for 0.5 to 20 minutes; leaving the silicon wafer rapidly heated and held for 0.5 to 20 minutes, down to a room temperature; and heating the thus cooled silicon wafer from temperatures of 500 to 700xc2x0 C. up to temperatures of 800 to 1,100xc2x0 C. at a rate of 2 to 10xc2x0 C./minute, and holding the silicon wafer at this temperature for 2 to 48 hours.
In this treating method, at the surface as well as the interior of the wafer rapidly heated under the aforementioned temperature condition, the concentration of interstitial silicon atoms temporarily becomes lower than a thermal equilibrium concentration, leading to a depleted condition of interstitial silicon atoms to thereby provide an environment where oxygen precipitation nuclei tend to stably grow. Simultaneously, generation of interstitial silicon atoms are caused at the wafer surface so as to fill the depleted interstitial silicon atoms into a stable condition, so that the generated interstitial silicon atoms start to diffuse into the interior of the wafer. The area near the wafer surface which has been in the depleted condition of interstitial silicon atoms immediately falls into a saturated condition so that oxygen precipitation nuclei start to disappear. However, it will take some period of time for interstitial silicon atoms grown in the wafer surface to diffuse into the wafer interior. Thus, the deeper the distance from the wafer surface into the wafer interior, the longer the period of time over which an environment for easy growth of oxygen precipitation nuclei is maintained. Therefore, the closer to the wafer surface, the lower the density of oxygen precipitation nuclei. Further, the longer the heat treatment time (0.5 to 20 minutes), the greater the thickness of a denuded zone (hereinafter called xe2x80x9cDZxe2x80x9d) in which oxygen precipitation nuclei, i.e., defects are not formed. Moreover, the higher the temperature in the range of 800 to 1,000xc2x0 C., the larger the diffusion coefficient of interstitial silicon atoms, so that the thickness of the DZ becomes large in a short time.
Rapidly heating, leaving at a room temperature and then heating again the wafer up to temperatures of 800 to 1,100xc2x0 C. results in that those oxygen precipitation nuclei within the wafer, which have survived with the rapid heating, grow into oxygen precipitations and become stable IG sources.
However, the aforementioned heat treatment method requires, as a pre-treatment for generating IG sources, introducing oxygen precipitation nuclei into a silicon wafer just ground and polished by holding the wafer at 500 to 800xc2x0 C. for 0.5 to 20 hours, and heat treating after rapid heating so as to render oxygen precipitation nuclei within the wafer to grow into oxygen precipitations. This causes a problem of unnecessarily many times of heat treatment in the state of wafer.
Further, the V/G value for forming a silicon wafer comprising the perfect domain [P] is proportional to a pulling-up speed V of an ingot when the temperature gradient G is constant, thereby requiring that the ingot is pulled up at a relatively slow speed controlled within a narrow range. However, it is not necessarily easy to technically satisfy such a requirement, and the productivity of ingot is never high.
To solve this problem, there has been proposed a method for pulling up a single crystal of silicon at an N2(V) domain repleted with oxygen precipitations (corresponding to the [PV] domain of the present invention) outside an OSF ring or at N1(V) domain and N2(V) domain inside and outside the OSF ring inclusive of the OSF ring, in a defect distribution diagram having an ordinate representing a V/G value and an abscissa representing a distance D from the center of crystal to the edge of crystal (Japanese Patent Application Laid-Open No. HEI-11-157996). According to this method under a readily controllable manufacturing condition, there can be manufactured a silicon wafer, which is free of the domain [I] and domain [V], is at an extremely low defect density over the entire crystal, and is capable of exhibiting an IG effect by oxygen precipitations, while maintaining a higher productivity.
However, in the manufacturing method of a single crystal of silicon described in the Japanese Patent Application Laid-Open No. HEI-11-157996, in order to prevent OSF nuclei from growing upon an thermal oxidization treatment of OSF""s in a silicon wafer condition, there is imposed restriction to use a silicon wafer having an oxygen concentration within the grown crystal restricted to less than 24 ppma (ASTM ""79 value) [corresponding to approximately 1.2xc3x971018 atoms/cm3 (old ASTM)] or restricted to control the heat history such that the period of time for passing through the temperature range from 1,050xc2x0 C. to 850xc2x0 C. becomes 140 minutes or less.
It is therefore a first object of the present invention to provide a silicon wafer, which is free of OSF""s, is capable of reducing the number of COP""s greater than 0.12 xcexcm down to substantially zero, and is substantially free of contamination such as Fe and of occurrence of slip, and to provide a method for manufacturing such a silicon wafer.
It is a second object of the present invention to provide a silicon wafer free of OSF""s and COP""s and substantially free of contamination such as Fe and of occurrence of slip, and to provide a method for manufacturing such a silicon wafer.
It is a third object of the present invention to provide a silicon wafer in which oxygen precipitations uniformly appear from the center toward the edge of the wafer to thereby exhibit an IG effect, upon heat treating the wafer in a semiconductor device manufacturing process.
It is a fourth object of the present invention to provide a heat treatment method for obtaining a silicon wafer which is free of OSF""s and COP""s and substantially free of contamination such as Fe and of occurrence of slip, even after the conventional OSF actualization heat treatment.
It is a fifth object of the present invention to provide a heat treatment method of a silicon wafer which is free of existence of agglomerates of point defects and is capable of exhibiting a desired IG effect with a reduced number of heat treatments in a silicon wafer condition.
It is a sixth object of the present invention to provide a manufacturing method of a silicon wafer which is free of existence of agglomerates of point defects and by which an IG effect is exhibited, even when the silicon wafer has been sliced out from an ingot comprising a mixed domain of a domain [PV] and a domain [PI] and has an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM).
It is a seventh object of the present invention to provide a silicon wafer which is manufactured by this method and has a higher IG ability.
It is an eighth object of the present invention to provide a heat treatment method of a silicon wafer which is free of existence of agglomerates of point defects and by which an IG effect is exhibited, even when the silicon wafer has been sliced out from an ingot comprising one or both of a domain [PV] and a domain [PI] and has an oxygen concentration of 1.2xc3x971018 atoms/cm3 (old ASTM) or more.
It is a ninth object of the present invention to provide a heat treatment method of a silicon wafer which is free of existence of agglomerates of point defects and by which a uniform IG effect is exhibited within the wafer surface, even when the silicon wafer has been sliced out from an ingot comprising a mixed domain of a domain [OSF] and a domain [PV] and has an oxygen concentration of 1.2xc3x971018 atoms/cm3 (old ASTM) or more.
It is a tenth object of the present invention to provide a heat treatment method of a silicon wafer free of existence of agglomerates of point defects, without requiring any oxygen doner killing treatments.
The first aspect of the present invention resides in a silicon wafer, wherein no oxidation induced stacking faults (OSF""s) are generated in the silicon wafer when the silicon wafer is heat treated in an oxygen atmosphere at temperatures in a range of 1,000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours, and subsequently heat treated at temperatures in a range of 1,130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours; wherein the number of crystal originated particles (COP""s) smaller than 0.12 xcexcm in the wafer surface is within a range of 3 to 10 pieces/cm2; and wherein the number of crystal originated particles (COP""s) of 0.12 xcexcm or greater in the wafer surface is 0.5 pieces/cm2 or less.
The second aspect of the present invention resides in a method of manufacturing a silicon wafer, comprising the steps of: pulling up a single silicon crystal ingot from a silicon melt; and slicing the ingot into a silicon wafer; wherein the ingot is pulled up such that V/Ga and V/Gb become 0.23 to 0.50 mm2/minute xc2x0 C., respectively, where V (mm/minute) is a pulling-up speed, and Ga (xc2x0 C./mm) is an axial temperature gradient at the center of the ingot and Gb (xc2x0 C./mm) is an axial temperature gradient at the edge of the ingot at temperatures in a range of 1,300xc2x0 C. to a melting point of silicon.
The third aspect of the present invention resides in a method for heat treating a silicon wafer including no crystal originated particles nor dislocation pits in the surface of the silicon wafer, in which OSF""s should actualize at the center of the silicon wafer if the silicon wafer was heat treated in a oxygen atmosphere at temperatures of 1,000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours and subsequently heat treated at temperatures of 1,130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours, the method comprising the step of: heat treating the silicon wafer in an atmosphere of 100% oxygen or in a mixed atmosphere of oxygen and nitrogen at temperatures of 1,130xc2x0 C. to 1,200xc2x0 C. for 1 minute to 6 hours.
The fourth aspect of the present invention resides in a method for heat treating a silicon wafer including no crystal originated particles nor dislocation pits in the surface of the silicon wafer, in which OSF""s should actualize at the center of the silicon wafer if the silicon wafer was heat treated in a oxygen atmosphere at temperatures of 1,000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours and subsequently heat treated at temperatures of 1,130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours, the method comprising the step of: heat treating the silicon wafer in an atmosphere of 100% argon at temperatures of 1,130xc2x0 C. to 1,200xc2x0 C. for 1 minute to 6 hours.
The fifth aspect of the present invention resides in a method for heat treating a silicon wafer including no crystal originated particles nor dislocation pits in the surface of the silicon wafer, in which OSF""s should actualize at the center of the silicon wafer if the silicon wafer was heat treated in a oxygen atmosphere at temperatures of 1,000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours and subsequently heat treated at temperatures of 1,130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours, the method comprising the step of: heat treating the silicon wafer in an atmosphere of 100% hydrogen or in a mixed atmosphere of hydrogen and argon at temperatures of 1,150xc2x0 C. to 1,250xc2x0 C. for 1 minute to 4 hours.
The sixth aspect of the present invention resides in a heat treatment method of a silicon wafer for rendering the silicon wafer to exhibit an IG effect, in which when the silicon wafer was heat treated by an OSF-actualizing heat treatment, OSF""s should be generated in 25% or more of the entire area of the silicon wafer and oxygen precipitations accompanied with no dislocation generation should be generated at a density of 1xc3x97105 to 3xc3x97107 pieces/cm2, the method comprising the step of: rapidly heating the silicon wafer in a hydrogen gas atmosphere or in an atmosphere including hydrogen gas from a room temperature up to 1,100xc2x0 C. to 1,250xc2x0 C. at a temperature elevating speed of 3xc2x0 C./minute to 150xc2x0 C./second, and then holding the silicon wafer for 1 minute to 2 hours.
According to the heat treatment method of the sixth aspect, adoption of the wafer including oxygen precipitations at a predetermined density in the OSF domain existing at the above ratios eliminates a conventional preheating process for introducing oxygen precipitation nuclei into the wafer and a conventional growing process of oxygen precipitation nuclei, and rapidly heating the polished wafer under the above condition leads to a higher IG effect.
The seventh aspect of the present invention resides in a heat treatment method of a silicon wafer for rendering the silicon wafer to exhibit an IG effect, in which the silicon wafer comprises a mixed domain of [PV] and [PI] and has an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM),
where [PI] is a domain neighboring with a domain [I] dominated by interstitial silicon point defects, is classified into a perfect domain [P] including no agglomerates of point defects, and has a concentration of interstitial silicons lower than the lowest concentration of interstitial silicons capable of forming interstitial dislocations, and where [PV] is a domain neighboring with a domain [V] dominated by vacancy point defects, is classified into the perfect domain [P], and has a concentration of vacancies equal to or lower than a concentration of vacancies capable of forming COP""s or FPD""s, the method comprising the steps of: conducting a first step heat treatment for holding the silicon wafer in an atmosphere of nitrogen, argon, hydrogen or oxygen or mixture thereof at temperatures of 600xc2x0 C. to 850xc2x0 C. for 120 to 250 minutes; and subsequently conducting a second step heat treatment for rapidly heating the silicon wafer in a hydrogen gas or in an atmosphere including a hydrogen gas from a room temperature up to temperatures of 1,100xc2x0 C. to 1,250xc2x0 C. at a temperature elevating speed of 3xc2x0 C./minute to 150xc2x0 C./second, and for holding the silicon wafer for 1 minute to 2 hours.
The eighth aspect of the present invention resides in a heat treatment method of a silicon wafer for rendering the silicon wafer to exhibit an IG effect, in which the silicon wafer comprises a mixed domain of [PV] and [PI] and has an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM), where [PI] is a domain neighboring with a domain [I] dominated by interstitial silicon point defects, is classified into a perfect domain [P] including no agglomerates of point defects, and has a concentration of interstitial silicons lower than the lowest concentration of interstitial silicons capable of forming interstitial dislocations, and where [PV] is a domain neighboring with a domain [V] dominated by vacancy point defects, is classified into the perfect domain [P], and has a concentration of vacancies equal to or lower than a concentration of vacancies capable of forming COP""s or FPD""s, the method comprising the steps of: conducting a first step heat treatment for heating the silicon wafer in an atmosphere of nitrogen, argon, hydrogen or oxygen or mixture thereof from a room temperature up to 1,150xc2x0 C. to 1,200xc2x0 C. at a temperature elevating speed of 10xc2x0 C./second to 150xc2x0 C./second, and for holding the silicon wafer at temperatures of 1,150xc2x0 C. to 1,200xc2x0 C. for 0 to 30 seconds; and subsequently conducting a second step heat treatment for rapidly heating the silicon wafer in a hydrogen gas or in an atmosphere including a hydrogen gas from a room temperature up to temperatures of 1,100xc2x0 C. to 1,250xc2x0 C. at a temperature elevating speed of 3xc2x0 C./minute to 10xc2x0 C./second, and for holding the silicon wafer for 1 minute to 2 hours.
According to the heat treatment method of the seventh or eighth aspect, when the silicon wafer comprises a mixed domain of [PV] and [PI] and has an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM), conducting the first step heat treatment for the silicon wafer results in that oxygen precipitation nuclei appear also in the domain [PI] into which no oxygen precipitation nuclei have been introduced upon crystal growth, and simultaneously therewith, the density of oxygen precipitation nuclei is increased in the domain [PV] into which oxygen precipitation nuclei have been introduced upon crystal growth. Thus, when the silicon wafer treated by the first step heat treatment is rapidly heated in a hydrogen gas or in an atmosphere including a hydrogen gas to thereby conduct the second step heat treatment, the oxygen precipitation nuclei grow into oxygen precipitations, so that the silicon wafer comprising even the domain [PV] and domain [PI] is brought to have an IG effect over the entire wafer surface. Hereinafter, xe2x80x9coxygen precipitationsxe2x80x9d may be called xe2x80x9cBMD (Bulk Micro Defect)xe2x80x9d.
The ninth aspect of the present invention resides in a method for heat treating a silicon wafer sliced out from a single silicon crystal ingot comprising a perfect domain [P], where, in the single silicon crystal ingot, [I] is a domain dominated by interstitial silicon point defects, [V] is a domain dominated by vacancy point defects, the perfect domain [P] includes no agglomerates of interstitial silicon point defects and no agglomerates of vacancy point defects, [PI] is a domain neighboring with the domain [I], is classified into the perfect domain [P], and has a concentration of interstitial silicons lower than the lowest concentration of interstitial silicons capable of forming interstitial dislocations, and [PV] is a domain neighboring with the domain [V], is classified into the perfect domain [P], and has a concentration of vacancies equal to or lower than a concentration of vacancies capable of forming COP""s or FPD""s; the method comprising the steps of: slicing out the silicon wafer from the single silicon crystal ingot, the single silicon crystal ingot comprising one or both of the domain [PV] and the domain [PI] and having an oxygen concentration of 1.2xc3x971018 atoms/cm3 or more (old ASTM), and heating the silicon wafer in an atmosphere of a hydrogen gas or an argon gas from a room temperature up to temperatures of 900xc2x0 C. to 1,200xc2x0 C. at a temperature elevating speed of 5 to 50xc2x0 C./minute, and then holding the silicon wafer for 5 to 120 minutes, to thereby conduct a first step heat treatment.
The tenth aspect of the present invention resides in a method for heat treating a silicon wafer sliced out from a single silicon crystal ingot comprising a perfect domain [P] including a domain [OSF], where, in the single silicon crystal ingot, [I] is a domain dominated by interstitial silicon point defects, [V] is a domain dominated by vacancy point defects, the perfect domain [P] includes no agglomerates of interstitial silicon point defects and no agglomerates of vacancy point defects, the domain [OSF] is classified into the domain [V], and OSF""s are to generate in the domain [OSF] when the ingot in a silicon wafer state is subjected to a thermal oxidization treatment, [PI] is a domain neighboring with the domain [I], is classified into the perfect domain [P], and has a concentration of interstitial silicons lower than the lowest concentration of interstitial silicons capable of forming interstitial dislocations, and [PV] is a domain neighboring with the domain [V], is classified into the perfect domain [P], and has a concentration of vacancies equal to or lower than a concentration of vacancies capable of forming COP""s or FPD""S; the method comprising the steps of: slicing out the silicon wafer from the single silicon crystal ingot, the single silicon crystal ingot comprising a mixed domain of the domain [OSF] and the domain [PV] and having an oxygen concentration of 1.2xc3x971018 atoms/cm3 or more (old ASTM), and heating the silicon wafer in an atmosphere of a hydrogen gas or an argon gas from a room temperature up to temperatures of 900xc2x0 C. to 1,200xc2x0 C. at a temperature elevating speed of 5 to 50xc2x0 C./minute, and then holding the silicon wafer for 5 to 120 minutes, to thereby conduct a first step heat treatment.
According to the heat treatment method of the ninth or tenth aspect, even if the ingot has an oxygen concentration of 1.2xc3x971018 or more (old ASTM), when the silicon wafer sliced out from the ingot is heat treated under the above condition and where the silicon wafer comprises one or both of the domain [PV] and domain [PI] or comprises the domain [OSF] and the domain [PV], those oxygen precipitation nuclei and OSF nuclei introduced into the wafer upon crystal growth shrink or disappear near the wafer surface by the out diffusion effect of oxygens within the wafer, to thereby form a DZ in the wafer surface. Further, since the oxygen concentration is 1.2xc3x971018 atoms/cm3 (old ASTM) at the portion deeper than near the wafer surface, BMD""s more than a predetermined density are generated to thereby exhibit an IG effect.